The Mechanics of Texture Mapping and Filtering Units in GPUs

Address Generation and Tiling

Textures are rarely stored in linear memory layouts because pixels in a 2D image are often accessed in 2D blocks. Fetching a linear row of pixels when the GPU requires a square block of data results in poor cache locality. To mitigate this, GPUs use morton-order or Z-order tiling, where memory is rearranged to keep spatially adjacent pixels physically close in memory. The TMU includes hardware logic to calculate the exact address of a texel by translating UV coordinates into the appropriate tiled memory address, a process critical for maintaining high throughput.

Filtering Mechanisms and Multitap Operations

When a texture is scaled or viewed at an angle, a single screen pixel rarely maps to a single texel. The TMU performs filtering to avoid aliasing artifacts. The most common methods are:

• Bilinear filtering: Fetches the four nearest texels and performs a weighted linear interpolation based on the sub-pixel coordinate.
• Trilinear filtering: Extends bilinear filtering by interpolating between two adjacent mipmap levels to eliminate visible seams during depth transitions.
• Anisotropic filtering: The most complex mode, requiring the TMU to sample multiple points along a distorted line of sight to maintain sharpness in textures viewed at oblique angles.

Cache Hierarchies and Bandwidth Optimization

Because texture lookups are frequent and memory bandwidth is a scarce resource, the TMU is tightly coupled with dedicated L1 and L2 texture caches. These caches are designed to handle irregular access patterns, a common occurrence when textures are sampled by threads executing in parallel. When multiple threads in a warp request adjacent texels, the hardware coalesce these requests to maximize memory bus efficiency. This reduction in round-trips to VRAM is the primary reason why specialized hardware outperforms general compute units for texture operations.

Engineers working on graphics or GPGPU workloads should consider the impact of texture format and compression (such as BCn or ASTC) on TMU utilization. Compressed textures reduce the effective bandwidth requirements and increase the hit rate in the TMU caches, directly influencing the frame rate. Balancing texture size, resolution, and filtering quality remains a core optimization challenge in high-performance rendering.